Low Power CMOS Charge Sharing Dynamic Latch Comparator using 0.18μm Technology

از لینک زیر مقاله  Low Power CMOS Charge Sharing Dynamic Latch Comparator using 0.18μm Technology  به همراه فایل شبیه سازی Hspice انرا میتوانید دریافت نمایید .   40000 تومان – خرید نهایی کردن خرید مورد به سبد خرید اضافه شد Abstract This paper discusses the design and analysis of a latching comparator using charge sharing circuit topology for low power and high speed. This topology combines the good features of the resistive dividing comparator and the differential current sensing comparator. This design will be focusing on...

Low Voltage, Double-Edge-Triggered Flip Flop

Double-edge-triggered flip flops (DETFFs) are recognized as power-saving flip flops. We study the same from a low voltage perspective [1-1.5V]. We combine a medium-to-high voltage, plain-MOS-style DETFF technique with a clock-skew technique to derive a new DETFF that is suited to low voltages. Speedwise, our result outperforms existing static DETFFs convincingly in the low voltage range. Powerwise, our flip  flop beats others for dynamic input in the lower half of the same range.The dynamic counterpart of our static circuit...